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RT9006A/B
Dual LDO Regulator with Reset Function
General Description
The RT9006A/B is an efficient, precise dual-channel CMOS LDO regulator optimized for ultra-low-quiescent applications. Regulators output1 and output2 are capable of sourcing 300mA and 500mA of output current. The RT9006' s performance is optimized for CD/DVD-ROM and CD/RW a supply applications. The RT9006A/B regulators are stable with output capacitors as low as 1F, including current limit, thermal shutdown protection, fast transient response, low dropout voltage, high output accuracy, current limiting protection, and high ripple rejection ratio. The RT9006A/B contains a reset circuit to detect VOUT2 voltage. The RT9006A/B regulators are available in used SOP-8 (Exposed Pad) surface mount package.
Features
Low Quiescent Current (Typically 70A) Wide Operating Voltage Ranges : 2.8V to 5.5V for RT9006A Wide Operating Voltage Ranges : 2.5V to 5.5V for RT9006B Ultra-Fast Transient Response Tight Load and Line Regulation Current Limiting Protection Thermal Shutdown Protection Only low-ESR Ceramic Capacitors Required for Stability RoHS Compliant and 100% Lead (Pb)-Free
Applications
CD/DVD-ROM, CD/RW Wireless LAN Card/Keyboard/Mouse Battery-Powered Equipment XDSL Router
Ordering Information
RT9006A/B Package Type SP : SOP-8 (Exposed Pad-Option 2) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Operating Frequency Version A : VOUT1 = 1.8V, VOUT2 = 3.3V B : VOUT1 = 1.5V, VOUT2 = 3.3V
Note : Richtek Pb-free and Green products are : RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. Suitable for use in SnPb or Pb-free soldering processes. 100% matte tin (Sn) plating.
Pin Configurations
(TOP VIEW)
VOUT1 VIN1 VIN2 VOUT2 2 3 4 8 GND 6 9 5 7 GND GND RST CT
SOP-8 (Exposed Pad)
Typical Application Circuit
VIN1 5V VIN1 C1 1uF RRST VOUT1 C3 1uF VOUT1
RT9006A/B RST CT
CCT VIN2 5V VIN2 VOUT2 GND C4 1uF VOUT2
C2 1uF
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Functional Pin Description
Pin No. 1 2 3 4 5 6 7, 8 Pin Name Pin Function VOUT1 VIN1 VIN2 VOUT2 CT RST GND Channel 1 Output Voltage Channel 1 Supply Voltage Channel 2 Supply Voltage Channel 2 Output Voltage RESET Delay Capacitor Detect VOUT 2 Output Voltage Common Ground The exposed pad must be soldered to a large PCB and connected to GND for maximum power dissipation.
Exposed Pad (9) GND
Function Block Diagram
Shutdown and Logic Control VREF + Error Amplifier
VIN1
MOS Driver VOUT1 Current-Limit and Thermal Protection
VIN2
+ CT
Error Amplifier
MOS Driver Current-Limit and Thermal Protection VOUT2
VREF RST +
VD Comparator
GND
RESET Waveform
VOUT2 3.3V 2.8V VHYS
Td RST
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Absolute Maximum Ratings
(Note 1) Input Voltage, VIN1, VIN2 --------------------------------------------------------------------------------------------- 6V Power Dissipation, PD @ TA = 25C SOP-8 (Exposed Pad) ----------------------------------------------------------------------------------------------- 1.33W Package Thermal Resistance (Note 4) SOP-8 (Exposed Pad), JA ------------------------------------------------------------------------------------------ 75C/W SOP-8 (Exposed Pad), JC ----------------------------------------------------------------------------------------- 28C/W Junction Temperature ------------------------------------------------------------------------------------------------- 150C Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------------------- 260C Storage Temperature Range ---------------------------------------------------------------------------------------- -65C to 150C ESD Susceptibility (Note 2) HBM (Human Body Mode) ------------------------------------------------------------------------------------------ 2kV MM (Machine Mode) -------------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 3)
Input Voltage, VIN1, VIN2 --------------------------------------------------------------------------------------------- 2.8V to 5.5V Junction Temperature Range ---------------------------------------------------------------------------------------- -40C to 125C Ambient Temperature Range ---------------------------------------------------------------------------------------- -40C to 85C
Electrical Characteristics
(VIN1 = VIN2 = 5V, C1 = C2 = 1F, C3 = C4 = 1F (Ceramic), TA = 25C, unless otherwise specified)
Parameter Regulator 1 Output Voltage Accuracy Output Voltage Temperature Coefficient Load Regulation
Symbol
Test Conditions
Min
Typ
Max
Units
VOUT1
IOUT1 = 30mA (RT9006A) IOUT1 = 30mA (RT9006B) IOUT1 = 200mA (Note5)
1.773 1.478 ---
1.8 1.5 -5
1.827 1.523 80 30
V
ppm/C mV
VLOAD1
1mA < IOUT1 <100mA VIN1 = 2.8V to 5.5V, IOUT1 = 30mA (RT9006A) VIN1 = 2.5V to 5.5V, IOUT1 = 30mA (RT9006B) f = 100Hz, IOUT1 = 100mA VIN1 = 5.0V, VOUT1 short to GND IOUT1 = 0A
Line Regulation
VLINE1
--
0.1
0.2
%/V
Power Supply Rejection Rate Current Limit Quiescent Current
PSRR1 ILIM1 IQ1
-400 ----
-60 -30 170 40
-600 ----
dB mA mA C C
Thermal Shutdown Protection TSD1 Thermal Shutdown Hysteresis TSD1 Regulator 2 Output Voltage Accuracy Output Voltage Temperature Coefficient VOUT2 IOUT2 = 30mA IOUT2 = 200mA (Note5)
3.25 --
3.3 --
3.35 80
V ppm/C
To be continued
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Parameter Load Regulation Dropout Voltage Quiescent Current Line Regulation Power Supply Rejection Rate Current Limit Symbol Test Conditions Min ------500 --Typ 5 50 150 40 0.1 -60 -170 40 Max 30 90 200 -0.2 -700 --mA %/V dB mA C C Units mV mV VLOAD2 1mA < IOUT2 < 100mA VDROP2_1 IOUT2 = 30mA VDROP2_2 IOUT2 = 100mA IQ2 VLINE2 PSRR2 ILIM2 IOUT2 = 0A VIN2 = 4.3V to 5.5V, IOUT2 = 30mA f = 100Hz, IOUT2 = 100mA VIN2 = 5.0V, VOUT2 short to GND
Thermal Shutdown Protection TSD2 Thermal Shutdown Hysteresis TSD2 Detector Detect Falling Voltage Hysteresis Sink Current CT Source Current VDF VHYS IRST ICT VRST = 0.5V, VIN2 = 5.0V
2.744 -7.0 2.1
2.8 -12.0 2.6
2.856 140 -3.1
V mV mA uA
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. JA is measured in the natural convection at TA = 25C on a high effective thermal conductivity test board (4 Layers, 2S2P) of JEDEC 51-7 thermal measurement standard. The case point of JC is on the expose pad for SOP-8 (Exposed Pad) package. Note 5. Guaranteed by design.
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Typical Operating Characteristics
C1 = C2 = 1uF(X7R), C3 = C4 = 1uF(X7R), RRST = 100k, unless otherwise specified.
Output Voltage vs. Temperature
4.0 3.5
Quiescent Current vs. Temperature
100
RT9006B VIN1 = VIN2 = 4.3V
RT9006A VIN1 = VIN2 = 4.3V
Quiescent Current (uA)
125
VOUT2
90
Output Voltage (V)
3.0 2.5 2.0
80
70
VOUT1
1.5 1.0 -50 -25 0 25 50 75 100
60
50 -50 -25 0 25 50 75 100 125
Temperature (C)
Temperature (C)
Detect Falling Voltage vs. Temperature
2.9
20
PSRR
RT9006A, VOUT1 VIN1 = VIN2 = 4.3V 0.1V
VOUT2
0
Detect Falling Voltage (V)
2.85
PSRR (dB)
-20
2.8
-40
2.75
ILOAD = 100mA
-60
ILOAD = 10mA
2.7 -50 -25 0 25 50 75 100 125
-80
0.01 10
0.1 100
1k 1000
10k 10000
100k 100000
1000k 1000000
Temperature (C)
(kHz) Frequency (Hz)
Dropout Voltage vs. Load Current
700 600
RST Pin Sinking Current vs. Input Voltage
40
RT9006B, VOUT2
RST Pin Sinking Current (mA)
35 30 25 20 15
RT9006A VRST = 0.5V TA = -40C TA = 25C
Dropout Voltage (mV)
500 400 300
TJ = 125C TJ = 25C TJ = -40C
200 100 0 0 100 200 300 400 500
TA = 125C
10 5 0 0 0.5 1 1.5 2 2.5 3
Load Current (mA)
Input Voltage (V)
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Detector Delay Time
10000 1000 100 10 1 0.1
Load Transient Response
RT9006B
RT9006A VIN1 = VIN2 = 4.3V
Detector Delay Time (ms)
IOUT (50mA/Div) VOUT1 (20mV/Div) VOUT2 (20mV/Div)
VIN1 = VIN2 = 4.3V, Both Loading = 10mA to 50mA
0.01 0.0001
0.0010
0.0100
0.1000
1.0000
Time (100s/Div)
CT Setting Capacitance (uF)
Load Transient Response
RT9006B
Load Transient Response
RT9006B
IOUT (100mA/Div) VOUT1 (50mV/Div) VOUT2 (50mV/Div)
VIN1 = VIN2 = 4.3V, Both Loading = 10mA to 100mA
IOUT (200mA/Div) VOUT1 (50mV/Div) VOUT2 (50mV/Div)
VIN1 = VIN2 = 4.3V, Both Loading = 10mA to 150mA
Time (100s/Div)
Time (100s/Div)
Line Transient Response
RT9006B 5.3
Line Transient Response
RT9006B
VIN (1V/Div) 4.3 VOUT1 (20mV/Div) VOUT2 (20mV/Div)
Both Loading = 10mA
VIN (1V/Div)
5.3 4.3
VOUT1 (20mV/Div) VOUT2 (20mV/Div)
Both Loading = 100mA
Time (100s/Div)
Time (100s/Div)
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Line Transient Response
RT9006B 5.3 4.3
VIN (1V/Div)
VOUT1 (20mV/Div) VOUT2 (20mV/Div)
Both Loading = 150mA
Time (100s/Div)
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Application Information
Detector Delay Time The delay time (Td) of Reset signal from VOUT2 can be calculated from the formula : 0.8 x VIN2 Td = CCT x ICT VIN2 is the input voltage of channel 2 and the ICT(2.6uA.Typ.) is the CT pin sourcing current. CCT is the capacitance of the external capacitor from CT pin to GND. Current limit The RT9006 contains two independent current limiters, which monitors and controls the pass transistor' s gate voltage, limiting the output current to a certain level. The typical current limit level of channel 1 and channel 2 is 450mA and 600mA respectively. Thermal Consideration For continued operation, do not exceed absolute maximum operation junction temperature 125C. The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula : PD(MAX) = ( TJ(MAX) - TA ) / JA Where TJ(MAX) : The maximum operation junction temperature 125C. TA : The operated ambient temperature. JA : The junction to ambient thermal resistance. The junction to ambient thermal resistance for SOP-8 (Exposed Pad) package is 75C/W on the standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The copper thickness is 2oz. The maximum power dissipation at TA = 25C can be calculated by following formula : PD(MAX) = (125C - 25C) / 75 C/W = 1.33W {SOP-8 (Exposed Pad) packages} The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance JA. For SOP-8 (Exposed Pad) packages, the Figure 1 of de-rating curves allows the designer to see the effect of rising ambient temperature on the maximum power allowed.
2.2 2
4-Layers PCB
Power Dissipation (W)
1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 0 16.25 32.5 48.75 65 81.25 97.5 113.8 130
Copper Area 70mm2 50mm2 30mm2 10mm2 Min. layout
Ambient Temperature (C)
Figure 1. Derating Curves for SOP-8 (Exposed Pad) Package PCB Layout Considerations The thermal resistance JA of SOP-8 (Exposed Pad) is determined by the package design and the PCB design. However, the package design had been designed. If possible, it's useful to increase thermal performance by the PCB design. The thermal resistance JA can be decreased by adding a copper under the exposed pad of SOP-8 (Exposed Pad) package. As shown in Figure 2, the amount of copper area to which the SOP-8 (Exposed Pad) is mounted affects thermal performance. When mounted to the standard SOP-8 (Exposed Pad) pad (Figure 2.a), JA is 75C/W. Adding copper area of pad under the SOP-8 (Exposed Pad) (Figure 2.b) reduces the JA to 64C/W. Even further, increasing the copper area of pad to 70mm2 (Figure 2.e) reduces the JA to 49C/W.
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(a). Minimum Footprint, JA = 75C/W
(b). Copper Area = 10mm2, JA = 64C/W
(c). Copper Area = 30mm2, JA = 54C/W
(d). Copper Area = 50mm2, JA = 51C/W
(e). Copper Area = 70mm2, JA = 49C/W Figure 2. Thermal Resistance vs. Copper Area Layout Design
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Outline Information
H M EXPOSED THERMAL PAD (Bottom of Package) Y J X B
A
F
C I D
Dimensions In Millimeters Symbol A B C D F H I J M Option 1 X Y X Option 2 Y Min 4.801 3.810 1.346 0.330 1.194 0.170 0.000 5.791 0.406 2.000 2.000 2.100 3.000 Max 5.004 4.000 1.753 0.510 1.346 0.254 0.152 6.200 1.270 2.300 2.300 2.500 3.500
Dimensions In Inches Min 0.189 0.150 0.053 0.013 0.047 0.007 0.000 0.228 0.016 0.079 0.079 0.083 0.118 Max 0.197 0.157 0.069 0.020 0.053 0.010 0.006 0.244 0.050 0.091 0.091 0.098 0.138
8-Lead SOP (Exposed Pad) Plastic Package
Richtek Technology Corporation
Headquarter 5F, No. 20, Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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